Assignment 15 - DMA

Need to do:

• Memory-to-peripheral mode: we are writing memory data to SPI (our peripheral)
• Circular Mode: used for continuous data modes, no maximum buffer needed. Change in DMA_CCRx register
• Channel Configuration Procedure:
  • Set DMA_CPARx register for peripheral register address as to what address we send data from
  • Ignore DMA_CMARx
  • Set DMA_CNDTRx to maximum data transfers to do before flushing. Should be 128 16bit data parts (since we write that out, 12bits of data and 4 bits of configuration)
  • Set DMA_CCRx register for configuration:
    • Channel Priority (can be 1 but add others in case on the same DMA)
    • Data transfer direction (outward)
    • Circular mode (on)
    • Peripheral and memory incremented mode
    • Peripheral and memory data size (see PSIZE and MSIZE)
    • Interrupt enable at half and/or full transfer and/or transfer error
• Enable DMA_CCRx EN bit to turn on the channel in question.

So for our purposes:

• DMA_ISR: ignore unless including interrupts
• DMA_CCR:
  • Bit 0 is 1 (EN) SET THIS LAST AS OTHER THINGS NEED THIS TO BE 0 PRIOR!!!
  • MEM2MEM: Bit 14 is 0 (disabled)
  • PL[1:0]: Bits 13:12 are 11 (very high priority)
  • MSIZE[1:0]: bits 11:10 are 01 (16 bits)
  • PSIZE[1:0]: bits 9:8 are 01 (16 bits)
  • MINC: 1 (may not be necessary)
  • PINC: 1 (may not be necessary)
  • CIRC: set to 1 (enabled)
  • DIR: 1 (read from memory, defines memory-to-peripheral or memory to memory based on other regs)
  • others are for ISR, which we ignore
• DMA_CNDTR: set to 128 (per our spec)
• DMA_CPAR: set to &SPI1->DR?
• DMA_CMAR: set to &data ?
• DMA_CSELR: set to SPI1_TX in bits 3:0 (0001) since we send data out of SPI1